RISC-V
Welcome to the FOSDEM 2026 RISC-V DevRoom
January 31, 2026
10:30 AM – 10:35 AM Add to calendar
10:30 AM – 10:35 AM Add to calendar
H.2214
<p>Welcome to the FOSDEM 2026 RISC-V DevRoom</p>
Additional information
| Live Stream | https://live.fosdem.org/watch/h2214 |
|---|---|
| Type | devroom |
| Language | English |
More sessions
| 1/31/26 |
<p>FFmpeg is the most versatile multimedia codec and format support library, and was one of the first open-source project to include some RISC-V-specific optimisations, though there is still a long way to go. The RISC-V Vector extension was also the first scalable vector extension to be supported. We will cover the background, challenges and outcomes of this effort.</p> <p>https://www.ffmpeg.org/</p>
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| 1/31/26 |
<p>A discussion of historical lessons that RISC-V did learn from, and mistakes that it repeated. Focused on the design constraints forced by RVC and RVV, as well as the choices around breaking out the F and D profiles out from a mandatory vector unit, and the state changes that come with it. </p> <p>The broad context will be specific to OoO SS processors</p>
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| 1/31/26 |
<p>Efforts to port Fedora Linux to RISC-V began in 2016, long before physical hardware was accessible to developers. Today, the vast majority of Fedora packages have already been ported to riscv64 (i.e. the RV64GC baseline) and OS images—both generic and board-specific—are available for recent releases.</p> <p>RISC-V is currently an <em>alternative</em> architecture in Fedora, so these (non-official) images are built by a dedicated team of community contributors, the Fedora RISC-V team. ...
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| 1/31/26 |
<p>This talk will introduce the architecture and instruction set of the ET Minion, a RISC-V CPU with custom extensions used in the ET platform, AI Foundry's open-source manycore architecture.</p> <p>The talk will describe the details of the custom vector and tensor extensions implemented in this minimal RISC-V core.</p> <p>For more information about the ET-platform and AI Foundry, visit https://github.com/aifoundry-org/et-platform</p>
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| 1/31/26 |
<p>In this talk I'll present the pain and joy of working on a BootROM we use for booting our RISC-V SoC prototypes in the lab, with networking capabilities. First I'll give an overview on how writing bare metal code looks like, the challenges one has to deal with, and how we solved it in a prototype-independent way. Then I'll present netboot as an example use case, give an idea of the constraints we had to deal with and where they came from, why such a thing is a requirement when working with ...
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| 1/31/26 |
<p>Last year, I gave a talk about running upstream embedded Linux on RISC-V with the powerful SpacemiT K1-based Banana Pi BPI-F3 as an example. Fast forward one year, and we have many a new contender on the block. This talk first revisits the BPI-F3, looking at the upstreaming progress made and issues remaining. Secondly, it introduces the new Siflower SF21H8898-based Banana Pi BPI-RV2, the ESWIN Computing EIC7700-based EBC77 with SiFive HiFive Premier P550 cores and the Ky X1-based Orange Pi ...
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| 1/31/26 |
<p>RISC-V hardware momentum is everywhere: more tape-outs, more open cores, more startups, and increasingly affordable boards that everyone can try. But hardware alone doesn’t make a usable platform. From blinking LEDs to critical space exploration missions, adoption depends on the software ecosystem being mature, well-integrated, and ready for developers to rely on.</p> <p>So, how ready is RISC-V software today? Toolchains, kernel support, hypervisors, RTOSes and simulators are all evolving, ...
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