Software Defined Radio(SDR)/Digital Signal Processing(DSP)

wSDR -- web based SDR processing

<p>WSDR is a web-based platform for real-time signal processing, application development, and custom workflow creation—all in a plug-and-play environment. Built on WebAssembly, WebUSB, and WebSockets, it supports even demanding workloads, including running a full open-source cellular network directly in the browser with all DSP executed on the frontend. In this session, we’ll show how WSDR simplifies building and deploying custom applications.</p>

Additional information

Live Stream https://live.fosdem.org/watch/k3601
Type devroom
Language English

More sessions

2/1/26
Software Defined Radio(SDR)/Digital Signal Processing(DSP)
Jean-Michel Friedt
K.3.601
<p>Welcome and introduction to the SDR/DSP devroom, some personal highlights of the past year and program description.</p>
2/1/26
Software Defined Radio(SDR)/Digital Signal Processing(DSP)
Abraxas3d
K.3.601
<p>Abstract: The Opulent Voice Protocol (OVP) is an open-source digital voice protocol designed for bandwidth-constrained radio communications, including satellite and terrestrial amateur radio links. Developed through the peer-reviewed research and development process at Open Research Institute, OVP addresses the critical need for high-quality voice communication protocols that are freely implementable without licensing restrictions.</p> <p>Built around the 16 kbps Opus voice codec, OVP ...
2/1/26
Software Defined Radio(SDR)/Digital Signal Processing(DSP)
Jean-Michel Friedt
K.3.601
<p>At a time when Global Navigation Satellite System (GNSS) signal spoofing and jamming has never been easier, time and frequency has become an ubiquitous commodity most distributed communication infrastructures rely on. Returning to the pre-space era of long range communication using very low frequency (VLF) signals, we investigate some of the remaining VLF time and frequency transfer signals. Despite their long communication range, the need for bulky antennas and low VLF noise environment ...
2/1/26
Software Defined Radio(SDR)/Digital Signal Processing(DSP)
Daniel Estévez
K.3.601
<p>The Parks-McClellan (Remez) algorithm is a filter design algorithm that is optimal in the sense that it minimizes the maximum error between the desired and realized transfer functions. Many implementations of this algorithm exist, including in GNU Radio and SciPy. However, some of these have issues such as numerical stability for some filter design problems. I will give a summary of the Remez algorithm, why there are different possible implementations, and why some may be better than others. ...
2/1/26
Software Defined Radio(SDR)/Digital Signal Processing(DSP)
Vanya Sergeev
K.3.601
<p>ZigRadio is a lightweight flow graph signal processing framework built with Zig that features ergonomic syntax, minimal dependencies, easy cross-compilation, and seamless integration into host applications. This talk introduces the project, discusses aspects of the Zig language leveraged by the framework, provides examples of standalone radio receivers as well as integrated applications, and outlines the future roadmap.</p>
2/1/26
Software Defined Radio(SDR)/Digital Signal Processing(DSP)
Tristan Gingold
K.3.601
<p>Since 2022, CERN uses White Rabbit to distribute the radio frequency signal in the SPS accelerator and the LHC accelerator is planned to also use White Rabbit for the next run (2030).</p> <p>This talk will give a short overview of the CERN accelerator complex, how RF is used to accelerate protons and what is White Rabbit. It will then discuss why the RF phase is very important for an accelerator, how clocks are synchronized, how RF is computed, digitally distributed and locally regenerated ...
2/1/26
Software Defined Radio(SDR)/Digital Signal Processing(DSP)
Jean-Michel Friedt
K.3.601
<p>White Rabbit (WR) is a digital synchronization protocol over Gb Ethernet whose development is centralized by CERN with contributions from high energy physics communities including accelerators and detectors. The sub-ns synchronization capability provided by WR makes it well suited for distributed-SDR system synchronization, but the phase detection mechanism requires two tunable oscillators hardly found in generic FPGA boards. Thanks to the advances of FPGA internal clocking circuitry, WR has ...